Google adds TPU 8tx for confidential inference and TPU 8i Max for long contexts

Google announced two more systems in its eighth-generation TPU line, which it says makes four new TPU systems in a single year. They join TPU 8t (training) and TPU 8i (low-latency reasoning), introduced at Google Cloud Next in April. Google did not give availability dates in the post.

TPU 8tx is aimed at secure, confidential inference and small-scale training for regulated enterprises and governments. Google says it keeps data and model weights protected in hardware even while in use, is built on TPU 8t silicon with 5th-generation AMD EPYC hosts, and delivers up to 2x lower latency than TPU 8t with a near-zero performance penalty.

TPU 8i Max puts two TPU 8i chips on one package. Google says it has double the compute, SRAM and HBM bandwidth of TPU 8i, targets very large context windows, and fits twice the silicon in the existing rack footprint.

Software for developers. Google says it open-sourced TorchTPU last month, so PyTorch code and Hugging Face models run natively on TPUs, with TPU backends for vLLM and SGLang. It also announced:

• an open-source TPU agent suite, in preview, that plugs into Claude Code, Cursor and Google Antigravity to onboard to TPUs, diagnose bottlenecks and tune kernels;
• an open-source XLA Serving Engine, to train in Python and serve in a C++ runtime across TPUs, GPUs and CPUs;
• TPU Sync, an open-source model-state layer that tiers KV caches off the chip, which Google says cuts KV transfer latency and time to first token by more than 90%;
• Agent Compute Engine, which suspends and resumes idle agent sessions to cut infrastructure costs;
• Cloud Pathways and GKE dynamic slicing, both now generally available on Google Kubernetes Engine; Google says dynamic slicing cuts job startup times by up to 5x and speeds fault recovery by up to 4.5x.

Google also says its vLLM-TorchTPU stack reached state-of-the-art price-performance on the InferenceX and AgentX benchmarks; these are Google's own claims.